Serving the Best Interests of Job Applicants and Hiring Companies

At Technical-Link, we provide remarkable staffing solutions for engineering job positions. Our unique recruitment techniques allow us to match the technical skills of aspiring applicants to the right company. Rely on us to provide the right resources for your needs.


Staffing Solutions for Recruiting Employers

Technical-Link offers a direct connection to a wide network of highly qualified technical professionals. With our help, you will have access to skilled job candidates that you might not know about or consider. Because of our work, we have earned a solid reputation with engineering managers for efficiently delivering top talents who are suitable for the job.

Services We Offer

Our recruiting firm provides three types of staffing solutions:

Keep your fast-paced project on schedule by enlisting the help of technical consultants for a short time. This type of employment placement will allow you to have the manpower to meet the deadlines of your current venture only.

Get to know the capabilities of engineering professionals through temporary assignments before you consider offering them a full-time position. This action will help you become confident in the working abilities of your candidate once you employ them for a long-term commitment.

We will assist you in finding the best full-time employee that suits your team’s personality, talent, and technical expectations.

Hire a Skilled Engineer

Obtain top talent for your company’s staffing needs. Our firm offers to help you discover today's most skilled engineering professionals for your technical job positions.


Employment for Technical Professionals

Impress high-performing companies with your background through Technical-Link. We will match your skills with the needs of reputable companies for the best placement possibilities.

Vacant Positions

Job Description:
You will be responsible for the following:

  • Implementing test plans to verify units in a subsystem chip-level functionality environment
  • Verifying peripherals
    • Peripheral component interconnect express (PCIe)
    • Serial advanced technology attachment (SATA)
    • Universal serial bus (USB)
    • Mobile industry processor interface (MIPI) protocols
  • Performing analog mixed-signal verification
    • Physical layer (PHY) verification
    • Advanced microcontroller bus architecture (AMBA) protocols
    • Register-transfer level (RTL)
  • Object-oriented programming (OOP) experience for test planning
  • Debugging adversarial testing
  • Utilizing Hardware Verification Languages (HVLs) and Very High-Speed Integrated Circuit (VHSIC) Hardware Description Languages (VHDLs)
    • Vera
    • Specman
    • SystemVerilog
    • Open Verification Methodology (OVM)
    • Verilog
    • C
    • C++
    • Tcl
    • Perl

Work Location:
Santa Clara, California


  • Bachelor of Science in Electrical Engineering
  • Five years of experience

Job Description:
Your tasks include making RTL design changes and validation, running all design checking tools, ensuring that a design is clean of any issues, performing synthesis and timing analysis, drive testing the plan and verification of IP block, and more. You will also communicate with top-level team members to support implementation tasks.

Work Location:
San Diego, California


  • Good understanding of digital design
  • Familiar with RTL design rule checking (DRC) Tools, such as:
    • Spyglass for linting, design for testing (DFT), and DFT deep submicron (DSM)
    • Clock domain crossing (CDC)
    • Conformal low power (CLP)
  • Simulation experience (VCs, write tests, debug waveforms, and more)
  • Extensive debugging and problem-solving experience
  • Familiar with synthesis and static timing analysis (STA) flow (Synopsys)
  • Good communication skills
  • Experienced in programming languages
    • VHDL
    • Verilog
    • Perl
    • C
    • C++
    • C-Shell
    • Uniplexed Information and Computing System (UNIX)

Job Description:
You will be part of a team responsible for the complete Physical Design Flow of Mobile Station Modem (MSM), Mobile Data Modem (MDM), and Cell Site Modem (CSM) chips. You will also perform the following tasks:

  • Work with the RTL design team to understand physical design timing closures, including the development of timing constraints required for implementation
  • Assist the DFT team in understanding DFT techniques for physical design timing closure
  • Lead core and top-level timing closure activities
  • Develop new scripts and flows to improve the timing closure process
  • Complete physical implementation of cores (i.e. graphics, video, multimedia, processor, Double Data Rate (DDR), and more)
  • Enable low power implementation methods
  • Core and top-level floor planning, placement, CTS, P&R, PV, and signal integrity analysis
  • Develop high-speed customized logic cells

Work Location:
San Diego, California or San Jose, California


  • Experience and knowledge of tools for CPU and GPU physical design implementation (Floorplanning, CTS, P&R, STA) in advanced technologies like 45nm and 28nm CMOS
  • Programming and scripting skills (Tcl, Perl, and/or C language)
  • Strong verbal and written communication skills
  • Additional expertise in one or more of the following areas:
    • STA tool and timing closure methodologies
    • Developing and implementing timing engineering change orders (ECOs), which includes the effect on congestion, routing, and power
    • Power grid, clock tree, and low-power reduction implementation methods
    • Signal integrity and timing closure issues such as on-chip variation (OCV), advanced OCV (AOCV), and statistical timing
    • Floorplanning
    • Placement
    • CTS
    • P&R
    • Physical verification
    • CLP
    • IR drop analysis
    • Formal verification

Job Description:
Your tasks include developing, debugging, and supporting tools based on an embedded real-time operating system (RTOS). You also program kernel OS, write hardware-level driver code for SoC's, establish and support build environments for tool users, and more.

Work Location:
San Diego, California or Bridgewater, New Jersey


  • At least five years of experience in embedded and kernel-level programming
  • Excellent C/C++ programming skills
  • Strong understanding of operating system (OS) concepts
  • Experienced in makefile
  • Good communication skills

Job Description:
You will handle various tasks assigned to you by the engineering manager, such as creating a circuit layout, maintaining IC systems, and more.

Work Location:
San Diego, California or Santa Clara, California


  • 7 to 10 years of experience in Radio Frequency (RF) and Analog Layout Design
  • Basic understanding of semiconductor devices
  • Basic understanding of CMOS 65nm, 40nm, and 28nm TSMC processes
  • 7 years of experience with Cadence VXL tools
  • 7 years of experience with Mentor Calibre verification tool
  • Experience in Cadence 6.1.5 OA is a plus
  • Excellent communication skills
  • Ability to work within a team environment

Send an Application

If you are interested in any of the vacant job positions, feel free to email your resume to us at janderson@technical-link.com. We will get in touch with you about your application as soon as we have reviewed it.

Work With Us Today

Contact our friendly staff today for quality technical recruiting services. We would gladly help you achieve your employment goals.